• Solar Silicon Wafer Cassette Compatible High Current 17.2% Polycrystalline Silicon Solar Cell System 1
  • Solar Silicon Wafer Cassette Compatible High Current 17.2% Polycrystalline Silicon Solar Cell System 2
  • Solar Silicon Wafer Cassette Compatible High Current 17.2% Polycrystalline Silicon Solar Cell System 3
Solar Silicon Wafer Cassette Compatible High Current 17.2% Polycrystalline Silicon Solar Cell

Solar Silicon Wafer Cassette Compatible High Current 17.2% Polycrystalline Silicon Solar Cell

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Loading Port:
Shanghai
Payment Terms:
TT OR LC
Min Order Qty:
1000 pc
Supply Capability:
100000 pc/month

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4 Bus Bars 156*156 17.6% efficiency poly solar cell 

PHYSICAL CHARACTERISTICS

 

Dimension:  156mm x 156mm ± 0.5mm

Wafer Thickeness:  180um+20um and 200um+20um

Front(-)                  Four 1.2mm silver busbar

                               Silicon nitride blue anti-reflection coating

                             

Back(+)                 aluminum back surface field
                                1.75mm(silver)  wide segment soldering pads

High Current Solar Cell 17.2% Polycrystalline Silicon Solar Cell Price


 Typical Electrical Characteristics

 

Efficiency

W(Pmpp)

V(Umpp)

A(Impp)

V(Uoc)

A(Isc)

17.4-17.5

4.234

0.517

8.231

0.622

8.759

17.5-17.6

4.259

0.519

8.243

0.623

8.769

17.7-17.8

4.283

0.521

8.256

0.625

8.779

17.8-17.9

4.307

0.523

8.268

0.626

8.788

17.9-18.0

4.332

0.525

8.281

0.627

8.798

18.0-18.1

4.380

0.529

8.306

0.629

8.808

18.1-18.2

4.405

0.531

8.318

0.632

8.818

18.2-18.3

4.429

0.533

8.331

0.633

8.837

18.3-18.4

4.453

0.535

8.344

0.634

8.847

18.4-18.5

4.478

0.537

8.356

0.636

8.856

18.5-18.6

4.502

0.539

8.369

0.637

8.866

 

 

 

 


Efficiency

W(Pmpp)

V(Umpp)

A(Impp)

V(Uoc)

A(Isc)

20.90-21.00

5.06

0.557

9.007

0.653

9.688

20.80-20.90

5.04

0.556

9.062

0.652

9.683

20.70-20.80

5.02

0.554

9.055

0.651

9.684

20.60-20.70

4.99

0.552

9.033

0.651

9.672

20.50-20.60

4.97

0.550

9.002

0.650

9.673

20.40-20.50

4.94

0.548

9.012

0.649

9.674

20.30-20.40

4.92

0.546

9.009

0.649

9.655

20.20-20.30

4.89

0.543

9.012

0.648

9.634

20.10-20.20

4.87

0.541

8.998

0.648

9.617

20.00-20.10

4.85

0.540

8.977

0.647

9.600



*Data under standard testing conditional (STC):1,000w/m2,AM1.5, 25°C , Pmax:Positive power tolerance.

 

3 Bus Bars 156*156 17.4% efficiency poly solar cell 

Dimension:  156 mm x 156 mm ± 0.5 mm

Wafer Thickeness: 156 mm x 156 mm ± 0.5 mm


High Current Solar Cell 17.2% Polycrystalline Silicon Solar Cell Price

Typical Electrical Characteristics:

 

Efficiency code16601680170017201740176017801800182018401860
Efficiency (%)16.616.817.017.217.417.617.818.018.218.418.6
Pmax       (W)4.044.094.144.194.234.284.334.384.434.484.53
Voc          (V)0.6120.6150.6180.6210.6240.6270.6290.630.6330.6350.637
Isc           (A)8.428.468.518.568.618.658.698.738.778.818.84
Imp         (A)7.917.998.088.168.228.278.338.388.438.488.53

* Testing conditions: 1000 W/m2, AM 1.5, 25 °C, Tolerance: Efficiency ± 0.2% abs., Pmpp ±1.5% rel.

* Imin : at 0.5 V


Production:

High Current Solar Cell 17.2% Polycrystalline Silicon Solar Cell Price



Package:


High Current Solar Cell 17.2% Polycrystalline Silicon Solar Cell Price



FAQ:

1. Q: Do you have your own factory?

   A: Yes, we have. Our factory located in Jiangsu

2. Q: How can I visit your factory?
    A: Before you visit,please contact us.We will show you the route or arrange a car to pick you up.
3. Q: Do you provide free sample?
    A: Commenly we provide paid sample.

4. Q: Could you print our company LOGO on the nameplate and package?

   A: Yes, we accept it.And need an Authorization Letter from you.

5. Q: Do you accept custom design on size?

   A: Yes, if the size is reasonable.

6. Q: How can I be your agent in my country?

   A: Please leave feedback. It's better for us to talk about details by email.

7. Q: Do you have solar project engineer who can guide me to install system?

   A: Yes, we have a professional engineer team. They can teach you how to install a solar system.




Q: Why do you want to make the wafer bigger? The bigger the better, why?
So the price of a light on the CCD. Because the yield is very low. Astronomical telescopes or military reconnaissance equipment used on the larger size of CCD (such as 4, 8 inches or even 12 inches CCD) is simply astronomical. Looking for a piece of silicon wafer that is close to zero defect is probably a vast project. And the speed of the chip is also affected by the area. The larger the area, the greater the span of the wiring, the greater the frequency of interference and signal
Q: 1 megawatts of solar energy need how many wafers
1 WP silicon chip, which is 1000000WPDo not know what you want to know? Detailed point!
Q: After cutting a few chips, mortar density is getting lower and lower
There are a lot of things that could happen1 lubricant is not qualified2 too many bubbles in the recycle bin3 mortar selection4, the operation speed is too fast5 wafer density is not uniform (the lowest possible)Try not to contact
Q: How is the quality of a solar silicon wafer measured?
The quality of a solar silicon wafer is typically measured through various tests and evaluations. These include monitoring the electrical properties such as resistivity and carrier lifetime, as well as assessing the physical characteristics like crystal structure, surface texture, and overall thickness uniformity. Additionally, optical measurements such as reflectivity and transmission are also taken into account. These evaluations help determine the efficiency and performance of the wafer in converting sunlight into electricity, ultimately indicating its quality.
Q: What is the role of the back contact on a solar silicon wafer?
The role of the back contact on a solar silicon wafer is to provide an electrical connection for the current generated by the solar cells. It helps in collecting and transferring the generated electricity from the front surface of the wafer to an external circuit for utilization or storage. Additionally, the back contact also helps in providing mechanical support and stability to the wafer.
Q: How is the purity of silicon determined for solar wafers?
The purity of silicon for solar wafers is determined through various methods, including chemical analysis and spectroscopy techniques. These methods assess the concentration of impurities such as metals, oxygen, and carbon in the silicon material. Additionally, the resistivity of the silicon is measured as an indicator of its purity. This thorough analysis ensures that the silicon used in solar wafers meets the required purity standards for efficient solar cell performance.
Q: How do solar silicon wafers perform in snowy conditions?
Solar silicon wafers generally perform well in snowy conditions, although their efficiency may be reduced. Snow can accumulate on the surface of the panels, blocking sunlight and affecting their ability to generate electricity. However, solar panels are designed to be self-cleaning to a certain extent, and as the snow melts or slides off, sunlight can reach the wafers again, allowing them to resume normal operation. Additionally, the dark color of the wafers helps absorb sunlight and aid in snow melt.
Q: What are the different doping techniques used in solar silicon wafers?
There are several doping techniques used in solar silicon wafers, including diffusion, ion implantation, and screen-printing. Diffusion involves introducing dopant atoms, such as phosphorus or boron, into the silicon wafer by heating it in the presence of a dopant source. Ion implantation involves bombarding the wafer with dopant ions, which then become embedded in the silicon lattice. Screen-printing involves applying a dopant paste onto the surface of the wafer and then firing it to create a doped layer. These techniques are used to create the necessary p-n junctions and optimize the electrical properties of the solar cells.
Q: What is the role of oxide layers on solar silicon wafers?
The role of oxide layers on solar silicon wafers is to act as a passivation layer, preventing recombination of charge carriers and improving the efficiency of the solar cell by reducing surface recombination and enhancing the electrical properties of the wafer.
Q: What are some of the silicon wafer factory
2 raw materials for deputy director, assistant director of the workshop material sorting and packaging materials packaging materials sorting operator monitor corrosion monitor cleaning cleaning raw materials warehousing operator member subtotal deputy director of the 3 crystal sandblasting operator workshop director assistant assistant statistician crystal crystal pulling monitor operator cut cut monitor operator subtotal

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